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How 3D NAND Stacks Up

  • January 2014
  • -
  • Forward Insights
  • -
  • 129 pages

The NAND flash industry is at a technology inflection point. Planar floating gate NAND flash memory is facing fundamental scaling challenges with the upcoming 16nm node the last generation of planar technology. What’s next?

Samsung’s August 2013 announcement of the production of a 24-layer vertical string V-NAND shows the way forward. Vertical NAND or 3D NAND promises to continue increases in storage capacities and lower cost per bit necessary to enable emerging applications such as solid state drives and cold flash.

In the 2D planar era, the basic underlying floating gate technology (with a few exceptions) was essentially the same amongst all the NAND flash manufacturers. However in the 3D era, all NAND flash memory manufacturers are developing different 3D architectures.
How 3D NAND Stacks Up compares the 3D NAND alternatives and provides an independent view of the challenges, advantages and disadvantages of the various implementations and illuminates the 3D NAND status of the major industry players.

Table Of Contents

How 3D NAND Stacks Up
Contents

List of Figures
List of Tables

Executive Summary

Introduction

NAND Flash Memory
NAND Flash Memory Technology Evolution
Floating Gate Memory Cell Scaling Challenges
Program Voltages and WL-WL Dielectric Breakdown
Number of Floating Gate Electrons, Charge Cross-talk, and Random Telegraph Noise
IPD Scaling of Electrical Thickness and Program Saturation: Can a Planar Cell be a Solution?
NAND alternative: Charge Trapping Memory Cell

3D NAND Alternatives
Conventional Approach
Samsung Stacking by Single Crystal Deposition
Concept
Advantages and Disadvantages
Challenges
Nonconventional approach
Horizontal channel - horizontal gate
Concept
Advantages/Disadvantages
Challenges
Vertical gate - Macronix TFT - Samsung VG-NAND
Concept
Advantages/Disadvantages
Challenges
Vertical Channel - Punch Structure
Toshiba BiCS
Concept - 1st Generation
Advantages and Disadvantages
Concept - 2nd Generation a p-BiCS structure
Challenges
Samsung TCAT
Concept
Advantages
Disadvantages
Challenges
Hynix Vertical Cylindrical Floating-gate
Concept
Advantages
Disadvantages
Challenges
SK Hynix SMArT - Stacked Memory Array Transistor
Concept
Advantages
Disadvantages
Challenges
Vertical Channel - Channel Wrap-around Structure
Samsung VSAT - Vertical Stacked Array Transistor
Concept
Advantages
Disadvantages
Challenges

Comparison of 3D Memory Concepts
Cell Size
Disturbs
Cell Efficiency
Number of Bits per cell Capability
Yield
Performance
Endurance
Retention
Power Consumption
Stackability
Summary

Outlook
3D NAND Status
Intel/Micron
Macronix
Samsung
SanDisk/Toshiba
SK Hynix
3D NAND Roadmap
3D NAND Cost Trend

References

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