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This report examines and projects the technology of equipment and materials involved in the fabrication of VLSI semiconductor devices, their likely developments, why and when their introduction or demise will take place, what problems and choices are facing users, and where the opportunities and pitfalls are. This report discusses the technology trends, products, applications, and suppliers of chemicals (liquids and gases) and equipment (lithography, plasma etching, and CMP). It also gives insights to suppliers for future user needs and should assist them in long range planning, new product development and product improvement.

Table Of Contents

The Global Market for Equipment and Materials for IC Manufacturing
Chapter 1 Introduction 1-1

Chapter 2 Low-K Dielectric Issues and Trends 2-1

2.1 Introduction 2-1
2.2 Ideal Dielectric 2-2
2.3 Types of Low-K Dielectrics 2-5
2.3.1 FSG 2-5
2.3.2 HSQ 2-7
2.3.3 Nanoporous Silica 2-8
2.3.4 Spin-on Polymers 2-9
2.3.5 BCB 2-16
2.3.6 Flowfill 2-16
2.3.7 CVD 2-17
2.3.8 AF4 2-20
2.3.9 PTFE 2-20
2.4 Processing Issues 2-21
2.5 Summary 2-33
2.5.1 Integration Issues 2-33
2.5.2 Low-K Dielectric Issues 2-34

Chapter 3 Lithography Issues And Trends 3-1

3.1 Optical Systems 3-1
3.1.1 Scanning Projection Aligners 3-5
3.1.2 Step-and-Repeat Aligners 3-14
3.1.3 248nm DUV Resist 3-31
3.1.4 193nm DUV Resist 3-33
3.1.5 Mix-and-Match 3-36
3.1.6 157nm DUV And Resist 3-37
3.1.7 EUV 3-42
3.2 X-Ray Systems 3-46
3.2.1 X-Ray Sources 3-46
3.2.2 X-Ray Masks 3-51
3.2.3 X-Ray Steppers 3-53
3.2.4 X-Ray Resists 3-54
3.3 Electron Beam Systems 3-55
3.4 Ion Beam Systems 3-62
3.4.1 Direct Write 3-62
3.4.2 Ion Channel Masking 3-63
3.4.3 Ion Projection 3-63
3.5 New Technologies 3-65
3.5.1 Mulith Reference Distribution Aerial Image Formation 3-65
3.5.2 Holograms 3-71
3.5.3 X-Ray Laser 3-71
3.5.4 Atom Lithography 3-71
3.5.5 Microlenses 3-75
3.5.6 Nano-Imprint Lithography 3-80
3.5.7 Immersion Lithography 3-84
3.6 Conclusion 3-88

Chapter 4 CMP Issues and Trends 4-1

4.1 Need for Planarity 4-1
4.1.1 Lithography 4-4
4.1.2 Deposition 4-6
4.1.3 Etching 4-9
4.2 Applications 4-10
4.2.1 Dielectrics 4-10
4.2.2 Metals 4-13
4.3 Planarization Techniques 4-15
4.3.1 Local Planarization 4-15
4.3.1.1 Deposition-Etchback 4-15
4.3.1.2 ECR 4-17
4.3.1.3 Oxide Reflow 4-17
4.3.1.4 Spin-on-Glass 4-18
4.3.1.5 TEOS-Ozone 4-18
4.3.1.6 Laser 4-19
4.3.2 Global Planarization 4-20
4.3.2.1 Polymer 4-20
4.3.2.2 Isotropic Etch 4-22
4.3.2.4 Spin Etch Planarization 4-23
4.3.2.5 Electropolishing 4-24
4.4 Chemical Mechanical Polishing (CMP) 4-26
4.4.1 Background 4-31
4.4.2 Research Efforts 4-32
4.4.3 Advantages and Disadvantages 4-33
4.4.4 Process Parameters 4-35
4.4.4.1 STI Planarization 4-36
4.4.4.2 Copper CMP 4-41
4.4.4.3 Low-K Integration 4-55
4.4.4.4 Defect Density 4-67
4.4.4.5 Metrology 4-69
4.4.5 Device Processing Parameters 4-83
4.4.5.1 Memory Devices 4-83
4.4.5.2 Logic Devices 4-84

Chapter 5 Factory Automation Issues and Trends 5-1

5.1 Introduction 5-1
5.2 Elements of Automation 5-2
5.2.1 Tool Automation 5-2
5.2.2 Intrabay Automation 5-3
5.2.3 Interbay Automation 5-4
5.2.4 Material-Control System 5-7
5.3 Flexible Automation 5-9
5.4 Reliability 5-11
5.5 Tool Issues and Trends 5-12
5.5.1 Flexible Tool Interface 5-12
5.5.2 Vacuum Robotics 5-31
5.5.3 AGV 5-41
5.5.4 CMP 5-44
5.5.5 300-mm Wafer Transport 5-45
5.5.6 Bridge Tools 5-48
5.5.7 Mini-Environments and Cleanroom Issues 5-51

Chapter 6 Thin Film Deposition Issues and Trends 6-1

6.1 Physical Vapor Deposition 6-1
6.1.1 Sputtering Technology 6-2
6.1.2 Plasma Technology 6-5
6.1.3 Reactor Designs 6-14
6.1.3.1 Long-Throw Deposition 6-14
6.1.3.2 Collimated Sputter Deposition 6-16
6.1.3.3 Showerhead Deposition 6-18
6.1.3.4 Ionized PVD 6-22
6.1.4 Semiconductor Processing 6-28
6.1.4.1 Feature Patterning 6-28
6.1.4.2 Gap Fill 6-31
6.2 Chemical Vapor Deposition (CVD) Techniques 6-34
6.2.1 APCVD 6-35
6.2.2 LPCVD 6-39
6.2.3 PECVD 6-42
6.2.4 HDPCVD 6-46
6.2.5 ALD 6-52

Chapter 7 Plasma Etching Issues and Trends 7-1

7.1 Introduction 7-1
7.2 Processing Issues 7-14
7.2.1 Chlorine Versus Fluorine Processes 7-19
7.2.2 Multilevel Structures 7-32
7.2.3 New Metallization Materials 7-39
7.2.4 GaAs Processing 7-46
7.3 Plasma Stripping 7-49
7.3.1 Photoresist Stripping 7-48
7.3.2 Low-K Removal 7-68

Chapter 8 Cluster Tools Issues and Trends 8-1

8.1 Definitions 8-1
8.2 Device Technology and Integrated Processing 8-4
8.3 Main Functional Units 8-7
8.3.1 Central Handling Platform 8-7
8.3.2 Cassette Stations 8-7
8.3.3 Extension Modules 8-8
8.3.4 Single Process Modules 8-8
8.3.5 Batch Modules 8-8
8.3.6 Multiple Process Modules 8-9
8.4 Cluster Tool Communications 8-10
8.4.1 Cluster Tool Controller 8-13
8.4.2 Transport Module Controller 8-13
8.4.3 Process Module Controller 8-14
8.4.4 Control Software 8-14
8.4.5 Human Interface Software 8-15
8.4.6 Networking Software 8-16
8.5 Vacuum System Design 8-17
8.6 Trends 8-17
8.6.1 Deposition - Plasma Etch 8-19
8.6.2 Deposition - Rapid Thermal Processing 8-20
8.6.3 Lithography - Resist Processing 8-21
8.6.4 Diagnostics - Process 8-22
8.6.5 CMP Polish - Clean 8-24

Chapter 9 Chemicals and Materials Issues and Trends 9-1

9.1 Liquid Chemicals 9-1
9.1.1 Acids and Solvents 9-1
9.1.2 Resists 9-6
9.1.2.1 Resist Materials 9-6
9.1.2.2 Resist Strippers 9-13
9.2 Purity Requirements 9-19
9.2.1 Purification Methods 9-19
9.1.1.1 Trends For Purity - Trace Elements 9-19
9.2.2 Particulates 9-20
9.2.2.1 Particulate Removal Techniques 9-21
9.2.2.2 Particle Monitoring 9-22
9.3 Chemical Management 9-23
9.4 Gases 9-27
9.4.1 Requirements 9-27
9.4.1.1 Purification Alternatives 9-27
9.4.2 Particulate Considerations 9-30
9.4.2.1 Particle Monitoring 9-30
9.4.2.2 Filtration Methods 9-30
9.4.3 Summary 9-31
9.5 Chemical Management 9-32
9.6 Sputtering and Evaporation Materials 9-34
9.6.1 Technology Issues 9-34
9.6.2 Purity Requirements 9-37

Chapter 10 Contamination Issues and Trends 10-1

10.1 Liquid Chemicals 10-1
10.1.1 Purification Methods 10-1
10.1.2 Particulates 10-2
10.1.2.1 Effects on Yield 10-2
10.1.2.2 Particle Removal 10-5
10.1.2.3 Particle Monitoring 10-19
10.1.3 Bulk Distribution vs Bottles 10-20
10.1.4 Piping System Construction 10-21
10.1.4.1 Materials of Construction 10-21
10.1.4.2 Cost Analysis 10-22
10.2 Gases 10-25
10.2.1 Technology Issues 10-25
10.2.2 Requirements 10-27
10.2.2.1 Purification Alternatives 10-27
10.2.2.2 Purity Trends 10-31
10.2.2.3 Particulate Considerations 10-38
10.3 Deionized Water 10-40
10.3.1 Purification Specifications 10-40
10.3.2 Purification Methods 10-41
10.3.3 Purity Measurement Techniques 10-43
10.3.4 Filtration and Ultrafiltration 10-43
10.3.5 Piping System Construction 10-44
10.3.6 DI Water System Costs 10-45
10.4 Processing Equipment 10-46
10.4.1 Detection Methods 10-46
10.4.2 Removal Techniques 10-51

Chapter 11 Metrology 11-1

11.1 Defect Review/Wafer Inspection 11-1
11.1.2 Defect Review 11-2
11.1.2.1 SEM Defect Review 11-3
11.1.2.2 Optical Defect Review 11-5
11.1.2.3 Other Defect Review 11-5
11.1.3 Patterned Wafer Inspection 11-8
11.1.3.1 E-Beam Patterned Wafer Inspection 11-8
11.1.3.2 Optical Patterned Wafer Inspection 11-9
11.1.4 Unpatterned Wafer Inspection 11-12
11.1.5 Macro-Defect Inspection 11-14
11.2 Thin Film Metrology 11-16
11.2.1 Metal Thin-Film Metrology 11-18
11.2.2 Non-Metal Thin-Film Metrology 11-24
11.2.3 Substrate Metrology 11-40
11.3 Lithography Metrology 11-43
11.3.1 Overlay 11-43
11.3.2 CD 11-48
11.3.3 Mask (Reticle) Metrology/Inspection 11-66

Chapter 12 Market Forecast 12-1

12.1 Market Drivers 12-1
12.1.1 Semiconductor Market 12-1
12.1.2 Technical Trends 12-7
12.1.3 Economic Trends 12-12
12.1.4 Geographic Trends 12-16
12.1.1.1 China 12-16
12.1.4.2 Asia 12-19
12.1.4.3 Europe 12-26
12.1.4.4 Japan 12-30
12.1.4.5 United States 12-32
12.2 Market Forecast Assumptions 12-36
12.3 Low-K Market 12-37
12.4 Lithography Market 12-45
12.5 CMP Market 12-50
12.5.1 CMP Polisher Market 12-50
12.5.2 CMP Slurry Market 12-54
12.6 Factory Automation Market 12-59
12.7 Thin Film Deposition Market 12-67
12.7.1 Chemical Vapor Deposition Market 12-69
12.7.2 Physical Vapor Deposition Market 12-73
12.8 Plasma Etching Market 12-76
12.9 Cluster Tool Market 12-80
12.9.1 Flexible Cluster Tool Market 12-81
12.9.2 Non-Flexible Cluster Tool Market 12-84
12.10 Chemical and Materials Market 12-87
12.10.1 Forecast by Chemical and Material 12-87
12.10.2 Market Shares 12-95
12.11 Cleanroom and Contamination Market 12-100
12.12 Metrology Market 12-108

LIST OF FIGURES

2.1 Interconnect Delay for Copper/Low-K 2-3
3.1 Lithography Roadmap 3-6
3.2 Lens Arrangement For Submicron Features 3-18
3.3 EUV Lithography 3-43
3.4 Illustration of X-Ray Lithography 3-49
3.5 Schematic Of Scalpel Electron Beam System 3-56
3.6 Multi-Source E-Beam Lithography 3-58
3.7 Principles of LEEPL 3-61
3.8 Ion Projection Lithography System 3-64
3.9 Mulith Reference Distribution Aerial Image Formation 3-70
3.10 Schematic of Microlens 3-76
3.11 Mapper Mask-Based Lithography 3-78
3.12 Mapper Maskless Lithography 3-79
3.13 Nanoimprint Lithography Process 3-81
3.14 Nanoimprint Lithography Process 3-82
4.1 Planarization Lengths of Various Methods 4-16
4.2 Normalized Removal Rates 4-27
4.3 Reduced Complexity With Copper 4-43
4.4 Copper Loss From CMP 4-48
4.5 CMP Copper Process Technologies 4-50
4.6 CMP Performance Improvements 4-52
4.7 Polish Endpoint Control 4-81
5.1 Material-Control System 5-8
5.2 Traditional and Flexible Automated Material Handling System 5-10
5.3 Overhead Monorail Delivery - Cassette in Box, Cassette in SMIF Pod 5-16
5.4 Stocker Design and Interfaces 5-54
6.1 Schematic Of Sputtering System 6-3
6.2 Magnetron Sputtering Design 6-9
6.3 Showerhead Reactor Design 6-19
6.4 Ionized PVD 6-24
6.5 APCVD Reactor 6-36
6.6 Tube CVD Reactor 6-40
6.7 HDPCVD Reactor 6-50
7.1 Various Enhanced Designs (a) Helicon, (b) Multiple ECR, (c) Helical Resonator 7-4
7.2 Schematic of Inductively Coupled Plasma Source 7-6
7.3 Schematic of the HRe Source 7-9
7.4 Schematic of the Dipole Magnet Source 7-10
7.5 Schematic of Chemical Downstream Etch 7-11
7.6 Silicon Trench Structure 7-21
7.7 Dual Damascene Dielectric Etch Approaches 7-35
8.1 Basic Cluster Tool Architecture 8-2
8.2 Basic Cluster Tool Architecture 8-3
8.3 Communications Architecture In A Cluster Tool 8-11
9.1 Chemical Management Services Tasks 9-24
10.1 Relationship Between Device Yield and Particles 10-4
10.2 Relationship Between Die Yield and Cost Size 10-6
10.3 Sources of Particles 10-46
11.1 Thin Film Metrology Challenges 11-25
11.2 Spectroscopic Ellipsometry Diagram 11-32
11.4 ITRS Overlay Technology Roadmap 11-44
11.5 NIST Line Edge Roughness Model 11-53
11.6 ITRS Metrology Roadmap 11-57
11.7 Schematic Of OCD Optics 11-62
11.8 Microlithography Process And Measurements 11-67
12.1 Low-K Deposition Market Shares 12-44
12.2 Worldwide Lithography Market Shares 12-47
12.3 Semiconductor Equipment Utilization 12-61
12.4 Market Shares of Automated Wafer Transfer Suppliers 12-66
12.5 Worldwide MCVD Market Shares 12-71
12.6 Worldwide DCVD Market Shares 12-72
12.7 Worldwide PVD Market Shares 12-75
12.8 Worldwide Market Shares for Dry Etch Equipment 12-78
12.9 Distribution of Etch Sales by Type 12-79
12.10 Market Forecast of Flexible Cluster Tools 12-82
12.11 Market Shares of Flexible Cluster Tools 12-83
12.12 Market Forecast of Non-Flexible Cluster Tools 12-85
12.13 Market Shares of Non-Flexible Cluster Tools 12-86
12.14 Worldwide Market Shares of Sputtering Target Suppliers 12-96
12.15 Worldwide Market Shares of Liquid Chemical Suppliers 12-97
12.16 Worldwide Market Shares of Photoresist Suppliers 12-98
12.17 Worldwide Market Shares of Silicon Wafer Suppliers 12-99
12.18 Total Metrology Market Forecast 12-110
12.19 Total Metrology Market By Geographic Region 12-112
12.20 Total Metrology Market Shares 12-113

LIST OF TABLES

2.1 Low-K Material Requirements 2-4
2.2 Low-K Materials 2-6
3.1 Lithography Requirements for IC Production 3-16
3.2 Advanced Optical Lithography Scenarios 3-27
3.3 Lithography Requirements 3-29
3.4 Characteristics of X-Ray Systems 3-47
4.1 Levels of Integration of Dynamic Rams 4-2
4.2 Interconnect Levels of Logic Device 4-3
4.3 Typical Process Specifications 4-11
4.4 Organic Polymers for IMD Applications 4-21
4.5 CMP Process Variables 4-29
4.7 Optimized CMP and Post-CMP Clean Parameters 4-37
4.8 Interconnect Materials by Segment 4-46
7.1 Silicon Wafer Usage 7-2
7.2 Plasma Source Comparison 7-12
7.3 Typical Process Specifications 7-18
7.4 Dry Resist Stripping Systems 7-51
8.1 Model for DRAM Production Line 8-5
9.1 Common Wafer Processing Chemicals 9-2
9.2 Photoresist Stripping Solutions 9-14
9.3 Wet Stripping Systems 9-17
10.1 Advantages and Disadvantages of Various Cleaning Methods 10-8
10.2 Chemical and Material Compatibility 10-18
10.3 Piping System Economic Analysis for Positive Developer 10-23
10.4 Gas Control System Issues 10-26
10.5 Range of Purity of CVD Gases 10-32
10.6 Potential Hazards of Processing Gases 10-37
10.7 Particle Sources 10-47
10.8 Location of In-Situ Monitors by Equipment Type 10-50
11.1 Comparison Of White-Light With Multiple-Angle Laser Ellipsometry 11-30
12.1 Worldwide Capital Spending 12-13
12.2 Worldwide GDP 12-14
12.3 Worldwide Market Forecast Low-K Market 12-38
12.4 Worldwide Stepper Market 12-46
12.5 Worldwide CMP Polisher Market 12-51
12.6 Worldwide CMP Market Shares 12-53
12.7 Worldwide CMP Slurry Market 12-55
12.8 Worldwide Forecast of Automated Transfer Tools 12-63
12.9 Worldwide CVD Market Forecast 12-70
12.10 Worldwide PVD Market Forecast 12-74
12.11 Worldwide Market Forecast of Plasma Etching Systems 12-77
12.12 Worldwide Forecast of Chemicals and Materials 12-88
12.13 Worldwide 300mm Wafer Fab Projects 12-104
12.14 Total Metrology Market Forecast 12-109

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