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Reverse Costing of Apple iPhone 6 iPhone 6 front camera module

  • November 2014
  • -
  • System Plus Consulting
  • -
  • 101 pages

For the iPhone 6 FaceTime camera module, Apple continues to integrate a 1.2Mpixel resolution CMOS Image Sensor. 81% of light sensitivity has been increased by using the camera aperture f/2.2, rising the pixel size from 1.75µm to 2.2µm and using an innovative microlenses array.

The unique technology from Sony (Exmor-RS) consists in a stacking of a pixel array circuit which uses a Back-Side Illuminated (BSI) technology and a logic ISP circuit processed with a 65nm technology node. This allows to raise the pixel array size by 15% and to considerably improve the light sensitivity by integrating an innovative grid and lenses design.

The camera module, with dimensions of 6.2 x 6.0 x 3.8mm, is equipped with a 4-elements lens module integrated in a very low cost package. The CIS is assembled in flip-chip on a ceramic substrate with a gold stud bumping process.

Table Of Contents

Reverse Costing of Apple iPhone 6 iPhone 6 front camera module
1. Overview / Introduction
- Executive Summary and Reverse Costing Methodology

2. Camera Module Supply Chain and Companies Profile
- iPhone 6 Camera Module Supply Chain
- Companies Profile (Sony, LG Innotek)

3. iPhone 6 Teardown

4. Physical Analysis
- Synthesis of the Physical Analysis
- Physical Analysis Methodology
Camera Module
- Camera Module View and Dimensions
- Camera Module X-Ray
- Camera Module Disassembly
Camera Module Cross-Section
- Overview- Housing
- Ceramic Substrate and IR Filter
- Lenses and FPC
CMOS Image Sensor 43
- View and Dimensions
- Pads, TSV Connections and Tungsten Grid
- CIS Pixels
- Logic Circuit (Main blocks, Transistors, SRAM)
CMOS Image Sensor Cross-Section
- Overview- Pixel Array Circuit
- Logic Circuit
- Pad Trenches and TSVs
Comparison with iPhone 6 Rear Camera CIS

5. CIS Manufacturing Process Flow
- Global Overview
- Logic Circuit Front-End Process
- Pixel Array Circuit Front-End Process
- BSI + TSV + Microlenses Process
- CIS Wafer Fabrication Unit

6. Cost Analysis
- Synthesis of the cost analysis
- Main steps of economic analysis
- Yields Hypotheses
CMOS Image Sensor Cost
- Logic Circuit Front-End Cost
- Pixel Array Front-end Cost
- BSI and TSV Front-End Cost
- Color Filters and Microlenses Front-End Cost
- Total Front-End Cost
- Back-End: Tests and Dicing
- CIS Wafer and Die Cost
Camera Module Assembly Cost
- Lens Module Cost
- Final Assembly Cost
Camera Module Cost

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