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Reverse Costing of Apple iPhone 6s Plus Rear Camera Module

  • December 2015
  • -
  • System Plus Consulting
  • -
  • 118 pages

With the iPhone 6s Plus, Apple introduces a new rear camera module. The new device has similar structure and technology than the previous one, but it has higher resolution and smaller pixel size.

The iPhone 6s Plus camera module integrates the 12Mpixel resolution CMOS Image Sensor, with aperture of f/2.2 and a pixel size of 1.22µm. The decreasing of the pixel size implies the introduction of Deep Trench Isolation structure.

Respect to the iPhone 6 Plus the logic ISP circuit with 45nm technology node process, the assembling structure and the 5-elements lens module are the same; otherwise technical ameliorations of the VCM brings to a better quality of the autofocus and the OIS.

The CIS is assembled in flip-chip on a ceramic substrate with a gold stud bumping process and uses the technology from Sony (Exmor-RS). The technology consists in a stacking of two separate chips using optimized processes: a pixel array circuit which uses a Back-Side Illuminated (BSI) technology, and a logic ISP circuit.

For this device Apple has significantly modified part of the supply chain.

The report includes comparisons with iPhone 5s and iPhone 6 Plus Rear Camera Module.

Table Of Contents

Reverse Costing of Apple iPhone 6s Plus Rear Camera Module
1. Introduction

2. Company Profile and Supply Chain

3. Physical Analysis
- Camera Module View and Dimensions
- Camera Module X-Ray
- Camera Module Disassembly
- CMOS Image Sensor
- View and Dimensions
- Pads, Tungsten Grid
- TSV Connections
- CIS Pixels
- Logic Circuit (Transistors, SRAM)
- Cross-Section: Camera Module Overview
- Driver (Assembly and Process) and MLCC
- Ceramic Substrate, IR Filter and FPC
- Lenses, Housing, VCM, IOS
- Cross-Section: CMOS Image Sensor Overview
- Pad Trenches
- Pixel Array Circuit
- Logic Circuit
- TSVs

4. Technology and Cost comparison with iPhone 5s and 6 Plus camera module

5. Manufacturing Process Flow
- Global Overview
- Logic Circuit Front-End Process
- Pixel Array Circuit Front-End Process
- BSI + TSV + Microlenses Process
- CIS Wafer Fabrication Unit

6. Cost Analysis
- Synthesis of the cost analysis
- Main steps of economic analysis
- Yields Hypotheses
- CMOS Image Sensor Cost
- Logic Circuit Front-End Cost
- Pixel Array Front-end Cost
- BSI , IOS and TSV Front-End Cost
- Color Filters and Microlenses Front-End Cost
- Total Front-End Cost
- Back-End: Tests and Dicing
- CIS Wafer and Die Cost
- Camera Module Assembly Cost
- Lens Module Cost
- VCM Actuator Cost
- Final Cost
- Camera Module Cost

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